1. Field of the Invention
The invention relates generally to computer development systems and more particularly to a logical grouping of facilities within a development system for high speed digital systems which may contain computer subsystems employing microprgammable VLSI devices, fixed instruction set devices or other state machines and program memory.
2. Description of the Prior Art
Development systems are used by computer design engineers to design, test and debug computer systems and subsystems. Development support has become more complex with the increased use of microprogrammable VLSI function chips that contain ever increasing performance and functional density. In the past, bit slice sequencers and arithmetic logic units (ALU) represented the microprogrammed parts with which the designer had to contend. Recently, many new functional microprogrammed VLSI circuits have appeared. Typically, such parts are used in systems comprising a microprocessor, special function VLSI chips with microprogrammability, microprogrammed subsystems and various program stores. Currently, there is no way to observe the state of various internal VLSI processes and control during debug and test. Logic analyzers are used to monitor the input and output of a VLSI device, a process by which the internal state can only be indirectly inferred. Furthermore, such results are often erroneous requiring a trial and error approach to determining state. It is desirable to have the ability to halt the execution of the entire system or parts of the system under test and examine the internal and external state of the entire system or subsystem and the path of execution. However, attempts to accomplish that have not been practical and none have been embodied in a single machine.